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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
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VLSI Implementation of Built-In Self Repair for Faulty Memory based on the Memory Address

Kiran G Nimbargi, B Ramesh, Praveen J, Raghavendra Rao A

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Abstract: In every application the memory is used to store the data and program etc. Based on the performance and requirement different memories are available. So the memory places almost direct impact on the performance of the application. During fabrication the fault may happen in the memory on the wafer or during use of the memory, due to some external disturbance or heat produced in the IC (Integrated Circuit) the memory may fail to work properly. So the memory testing is necessary even after fabrication and also during working of the memory by the user. If fault is found in the memory then repairing the fault is also important otherwise the application current work has to stop and the replacement of the IC is needed. So the implementation is done using built in self repair technique. Based on the address of each memory locations, if there is any fault in the memory then repairing is done by replacing the faulty memory with spare memories. Pointing the proper address is performed to access the proper data or to read from the memory. Keywords: System on Chip (SoC), Built-In Self Repair (BISR), spare memory, Built-In Self Test (BIST)

How to Cite:

[1] Kiran G Nimbargi, B Ramesh, Praveen J, Raghavendra Rao A, “VLSI Implementation of Built-In Self Repair for Faulty Memory based on the Memory Address,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE)

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