Abstract: This project presents the design and analysis of a Threshold Inverter Quantization (TIQ)-based Flash Analog-to-Digital Converter (ADC), aiming to address the limitations of conventional flash ADCs in terms of power consumption and chip area. Traditional flash ADCs, while offering high-speed conversion due to their parallel architecture, suffer from exponential growth in the number of comparators with increasing resolution, resulting in high power usage and large die size. The proposed TIQ Flash ADC replaces conventional comparators with cascaded CMOS inverters, leveraging transistor sizing to set internal reference voltages. This approach eliminates the need for a resistor ladder and reduces power consumption and complexity. The design also applies techniques such as gain boosting for sharper voltage thresholds and efficient encoding of the thermometer code to binary format. Simulation and analysis demonstrate that the TIQ-based ADC achieves comparable speed and resolution.

Keywords: VLSI, TIQ, ADC, Cadence Virtuoso.

Downloads: | DOI: 10.17148/IJIREEICE.2025.13830