POWER CONSUMPTION COMPARISON OF COVENTIONAL AND SINGLE-ENDED 6T SRAM CELL USING CMOS

Abstract: This project focusses on analysing memory systems' power usage utilising both single-ended and typical 6T SRAM cells. SRAM, or static random-access memory, is crucial for contemporary computer systems where power efficiency is a top priority. The traditional 6T SRAM cell uses a differential read method, which increases power consumption while offering great stability. The single-ended 6T SRAM cell, on the other hand, has a simpler read operation, which drastically lowers layout complexity and power consumption. The power dissipation of the two systems is assessed and compared in this study using simulation-based techniques. The results emphasise the limitations in power efficiency, showing that traditional 6T SRAM may be more appropriate for situations where power consumption is less crucial, while single-ended 6T SRAM cells are more suited for power-sensitive applications like low-power Internet of Things devices.

Keyword: SRAM Power Analysis, 6T SRAM Cell, Single-Ended SRAM, Low-Power Memory Design.