Abstract: The performance of fully-depleted Silicon-On-Insulator (SOI) Four Gate Transistor (G4-FET) and Gate-All-Around (GAA) MOSFETs are investigated. Threshold voltage, Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL), maximum drain current are calculated and compared.

Keywords: Silicon-on-Insulator (SOI), Four Gate Transistor (G4-FET), Gate-All-Around (GAA), Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL)

| DOI: 10.17148/IJIREEICE.2019.7301