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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
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← Back to VOLUME 13, ISSUE 8, AUGUST 2025

LOW POWER 3-BIT ENCODER DESIGN USING MEMRISTOR

Bhagya Shanthakumar, Deeksha V Nyamathi, Bindu D B, Keshava H C, Sachitha B S

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Abstract: Combinational circuits are the fundamental building blocks for almost all digital electronic systems. In this project, we are proposing one of the combinational circuit 3-bit encoder using Memristor. Here, we are designing 3-bit encoder in CMOS logic, Pseudo NMOS logic and Memristor (MRL) logic. A comparative analysis also have done among these configurations of design. From this analysis, we are able to choose best configuration of design that applicable for specified areas of applications.

Keywords: Memristor, 3-bit Encoder, Low Power Design, CMOS, Pseudo NMOS, MRL

How to Cite:

[1] Bhagya Shanthakumar, Deeksha V Nyamathi, Bindu D B, Keshava H C, Sachitha B S, “LOW POWER 3-BIT ENCODER DESIGN USING MEMRISTOR,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), DOI: 10.17148/IJIREEICE.2025.13804

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