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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
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High Speed IP Based Architecture for Telecommand System on chip (SoC)

Anupama Muralidharan

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Abstract: An IP (intellectual property) core is a block of logic or data that is used for making a field programmable gate array ( FPGA ) or application-specific integrated circuit ( ASIC ) for a product. Design reuse IP cores are part of the growing electronic design automation (EDA ) industry which allows the repeated use of previously designed components. Using many IP cores a system itself can be designed, System on Chip (SoC) offers this requirement. In the current telecommand communication method, excess number of physical devices is present, which cause a major communication delay. Combining many of the predesigned internal blocks in to a single chip can solve this problem. The paper is concerned with the design of telecommand and telemetry system and its peripheral devices like combined memory and error detection and correction (EDAC) unit. Keywords: EDAC, Telecommand, SoC.

How to Cite:

[1] Anupama Muralidharan, “High Speed IP Based Architecture for Telecommand System on chip (SoC),” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE)

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