Error Correction Codes Using Burst and Random Errors for Multiple-Cell Upsets in Space Application

Abstract: In space application, signals are transit from earth to space. Due to transition, radiation may occur. Thus, the probability of occurrence of Single-Cell Upsets (SCUs) or Multiple-Cell Upsets (MCUs) augments. One of the main causes of MCUs in space applications is high cosmic radiation. A common solution is the use of Error Correction Codes (ECCs). In this paper, compare the burst errors with random bit errors in ECCs and also a series of new low- redundant ECCs has been presented .These new ECCs improve the behaviour of the well-known able to correct MCUs with reduced area, power, and delay. Also, these new codes maintain, or even improve, memory error coverage with respect to Matrix and CLC codes. Currently, faults suffered by SRAM memory systems have increased due to the aggressive CMOS integration density. Nevertheless, when using ECCs in space applications, they must achieve a good balance between error coverage and redundancy, and their encoding/decoding circuits must be efficient in terms of area, power, and delay. Different codes have been proposed to tolerate MCUs. A common property of these codes is the high redundancy introduced. FUECs codes have been designed to MCUs in space applications which allow correction up to 4 -bit adjacent errors. FUEC-DAEC maintains coverage best, obtained results show that the proposed scheme is 11.438ns, 391nm², 345μw of delay, area, and power respectively. Beyond 4-bit burst errors, the performance of our codes decreases notably due to their low redundancy. Here introducing various random error bits to compare the burst error’s redundancy. And also designed DMC codes (up to 4-bit) .D-DMC maintain the low area, power, and delay of 10.402ns, 538nm², 410μW respectively over than other DMC. Comparing these two methodologies, D-DMC has low delay than FUEC-DAEC but FUEC-DAEC has low area, and power than D-DMC with an improved capability of error correction and detection.

Keywords: Error correction code (ECCs), multiple-cell upsets (MCUs), FUECs, DMCs, redundancy.