Abstract: This work presents the design and simulation of a two-stage CMOS operational amplifier integrated into an R-2R ladder-based Digital-to-Analog Converter (DAC). Implemented in 180nm CMOS technology, the amplifier comprises a differential input stage and a common-source gain stage, optimized for high gain, stability, and low power. The design supports 4-bit and 8-bit R-2R DAC architectures to achieve accurate digital-to-analog conversion. Simulations using Cadence Virtuoso and Spectre validated DC, AC, and transient performance, confirming linear outputs, low glitch energy, and power efficiency. The study demonstrates an efficient approach to compact analog interface design for modern mixed-signal systems.

Keywords: Amplifier, DAC, CMOS, Power.

Downloads: | DOI: 10.17148/IJIREEICE.2025.13905