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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
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← Back to VOLUME 5, ISSUE 5, MAY 2017

Design and Study of Floating Point Adders using Parallel Prefix Adders

Asif Hussain C V, R Dharmalingam

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Abstract: In this paper, we propose 32 bit types of Brent-Kung, Kogge-Stone and a Ladner-Fischer parallel prefix adders. In general N-bit adders like Ripple Carry Adders (very inefficient processes of adders compare to other adders), and Carry Look Ahead adders (area consuming adders) are used in earlier days. As existing methods of an emerging computational paradigm, an inexact circuit offers a promising method to significantly reductions of the both dynamic and static power dissipation for error-tolerant applications. an inexact floating-point adder is by approximately designing an exponent sub-tractor and mantissa adder. But now the most integrated circuits are using parallel prefix adders because of their advantages compare to other adders. Parallel prefix adders are faster and area efficient. We simulate and synthesis different types of 32-bit prefix adders using Xilinx ISE 10.1i tool. We using these systems out performances, we noted the performance parameters like number of LUTs and delay.

Keywords: Inexact circuits, floating-point adders prefix adder, carry operator.

How to Cite:

[1] Asif Hussain C V, R Dharmalingam, β€œDesign and Study of Floating Point Adders using Parallel Prefix Adders,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), DOI: 10.17148/IJIREEICE.2017.5553

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