πŸ“ž +91-7667918914 | βœ‰οΈ ijireeice@gmail.com
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
IJIREEICE meets the suggestive parameters outlined in the latest University Grants Commission (UGC) for peer-reviewed journals, ensuring high standards of research integrity, publication ethics, and academic excellence.
← Back to Archives

Performance Evaluation of 30 nm Double Gate MOSFET using VTCAD Tool

Shaweta Gulati, Jalpaben D. Pandya, Sandhya Save

πŸ‘ 2 viewsπŸ“₯ 0 downloads
Share: 𝕏 f in ✈ βœ‰
Abstract: Scaling the transistor sizes in the sub micro-meter regime has made it difficult to overcome the problem of short channel effects. Double Gate (DG) MOSFETs reduce the short channel effects and provide a better control of the threshold voltage by utilizing the electrostatic coupling from two gates on either side of the channel. Independent control of front and back gate in DG devices can be effectively used to improve performance and reduce power in sub- 50nm circuits. In this paper, our aim is to carry out simulations of Symmetric 30 nm Double Gate MOSFET in VTCAD and to improve the performance of MOSFET by studying the MOSFETs with double gate.

Keywords: Double Gate MOSFETs, Short Channel Effects, VTCAD, Drain Induced Barrier Lowering

How to Cite:

[1] Shaweta Gulati, Jalpaben D. Pandya, Sandhya Save, β€œPerformance Evaluation of 30 nm Double Gate MOSFET using VTCAD Tool,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE)

Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 International License.