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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
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An Efficient VLSI Implementation of OFDM based on Multiplier Less FFT & IFFT

S. Janani, K. Vijayakanth

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Abstract: Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier system where data bits are encoded to multiple subcarriers, while being sent simultaneously. OFDM is implemented by using the combination of FFT and IFFT. The Eight point DIT-FFT & DIF IFFT architecture is implemented as a Multiplier less architecture. The eight point DIT-FFT & DIF IFFT architecture consist of two points, four points, Eight Point as Stages. The OFDM architecture was implemented based on proposed Multiplier less FFT and IFFT Block. Fast Fourier Transform is one of the important algorithms in Digital signal processing (DSP).. In this proposed method the unity gain FFTs and IFFTs without compensation circuits is implemented by using shift and add method. It reduces the amount of hardware resources of the architecture with high accuracy in calculation. This proposed method can be applied to different sizes of FFT for various designs. This approach can be Implemented using Verilog HDL and Simulated by Modelsim 6.4 c. Finally it is synthesized by Xilinx tool and Implemented in FPGA Spartan 3 XC3S 200 TQ-144.

Keywords: OFDM, multiplier less FFT, multiplier less IFFT.

How to Cite:

[1] S. Janani, K. Vijayakanth, β€œAn Efficient VLSI Implementation of OFDM based on Multiplier Less FFT & IFFT,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), DOI: 10.17148/IJIREEICE.2017.5521

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