A Survey on Recent Research Trends Towards A Comprehensive Review of Energy-Efficient FIR Filters on FPGA

Abstract: Digital Signal Processing (DSP) is an important technology in modern communications, biomedical, audio, and image processing systems. The Finite Impulse Response (FIR) filter is widely used in digital signal processing due to its inherent stability, linear-phase characteristics, and efficient hardware implementation. FPGA-based implementations of FIR filters offer advantages such as high-speed operation and design flexibility; however, they often encounter challenges related to increased power consumption and hardware complexity. The paper provides a comprehensive review of recent low-power FPGA implementations of low-pass FIR filters, focusing on advanced optimization methods, including DA, CSD encoding, multiplier-less architectures, pipelining, coefficient optimization, and clock gating. It also compares the performance of these techniques in terms of power efficiency, latency, and hardware complexity, and discusses emerging challenges, research gaps, and future research opportunities.

Keywords: Digital Signal Processing, Energy Efficiency, Low-Pass Filter, FPGA, Finite Impulse Response, Hardware Optimization, Low-Power Design, Verilog HDL