A Five Level Three Phase Cascaded Inverter

Abstract: This paper present the five level three phase cascaded inverter. This paper focuses on improving the efficiency of the multilevel inverter and quality of output voltage waveform. The modified PWM technique is also developed to reduce harmonics. Five level reduced switches topology has been implemented with only 24 switches. Fundamental Switching scheme and Selective Harmonics Elimination were implemented to reduce the Total Harmonics Distortion (THD) value and switching losses. The simulation diagrams of multilevel inverter are carried out in MATLAB (R2013A) / Simulink environment to evaluate the performance of the system. Keywords: Multilevel Inverter, Sinusoidal Pulse Width Modulation, Total Harmonics Distortion.