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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
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← Back to VOLUME 2, ISSUE 11, NOVEMBER 2014

Low Power and High Speed CMOS Circuits

T.SHEELA, T.MUTHUMANICKAM, G.RAMACHANDRAN, A.NAGAPPAN

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Abstract: In recent trends, multi-threshold CMOS technology is advancing to enhance performance of any digital circuits. By use of this technology any digital circuit makes use of both low threshold voltage (VDDL) and high threshold voltage (VDDH) MOSFETs. Propagation delay time of a circuit is reduced by using VDDL and consumption of power is reduced by using VDDH. One of the best techniques to reduce the power consumption is scaling the supply voltage VDD. In order to maintain the generational speed enhancement, the device threshold voltage VTH must also scale down with VDD. This paper proposes a low-power circuit with MTCMOS technology, simulation results shows that power consumption is reduced approximately by61.7%.

Keywords: Multi-threshold CMOS (MTCMOS), low power circuit, VDDH, VDDL.

How to Cite:

[1] T.SHEELA, T.MUTHUMANICKAM, G.RAMACHANDRAN, A.NAGAPPAN, “Low Power and High Speed CMOS Circuits,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), DOI: 10.17148/IJIREEICE.2014.21108

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