Design and Implementation of SDR Transceiver Architecture on FPGA

Abstract: Usage of Software-Defined Radio (SDR) in digital communication systems can easily cater to sophisticated coding and modulation techniques, to meet the ever-increasing requirements of the wireless communication industry. Future generation of wireless communications will meet the requirements of Software Radio technology as it would provide the state-of-art design to complex radio designs. Software-defined radios are configurable devices in which the components can be reprogrammed to emulate various functionalities like data rate, modulation, filtering etc. Field programmable architectures provide a suitable platform to achieve such run-time reconfigurations of the components of the radio. Software defined radios are highly configurable that provide the technology for realizing the rapidly expanding third and future generation digital wireless communication infrastructure. There are a number of silicon alternatives available for implementing the various functions in a SDR, field programmable gate arrays (FPGAs) are an attractive option for many of these tasks for reasons of performance, power consumption and flexibility. The aim of this project is to study and understand SDR using Xilinx [1]. Keywords: QPSK, Power efficiency, Spectral efficiency, Synchronization.