AIDI: Adaptive Image Denoising IP-core based on FPGA

Abstract: The presence of noise in images can significantly impact the performances of computer vision algorithms and digital image processing. Thus, noise should be removed to improve the robustness of the entire process. Denoising or noise reduction is one of the most essential processes for digital image processing. The main goal of denoising is how to remove the noise while keeping the important features of the image. The denoising methods should not alter the original image, most denoising methods degrade or remove the fine details. This paper p(¦)resents an Adaptive Image Denoising IP-core (AIDI) for real time applications. Here core first estimates the level of noise in the input image, then applies an adaptive Gaussian smoothing filter to remove the estimated noise. The filtering parameters are computed on-the-fly, adapting them to the level of noise in the image and pixel by pixel to preserve image information (e.g., edges or corners). The noise estimation in an image is also a key factor since to be more effective, algorithms and denoising filters should be tuned to the actual level of noise. Moreover, the complexity of these algorithms brings a new challenge in real-time image processing applications, requiring high computing capacity. In this context, hardware acceleration is crucial, and Field Programmable Gate Arrays (FPGAs) best fit the growing demand of computational capabilities. The architecture uses FPGA, it shows the improvements with respect to a standard static filtering approach. Keywords: Gaussian noise, noise estimation, Laplacian operator, noise reduction, edge detection. Adaptive Gaussian filtering, Gaussian noise, denoising.