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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
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A novel architecture for a DSCDMA-CI transmitter using cordic and its FPGA Implementation

Meghana Shetty, Yuvraj T, Praveen J, Raghavengra Rao R

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Abstract: This paper presents a new approach of designing a DSCDMA-CI Transmitter using the cordic algorithm to generate the carriers whose offset is controlled by the carrier Interferometry (CI) codes. The Architecture thus proposed is reconfigurable, ie the spreading codes can be changed dynamically during the transmission. This design proves better than the traditional DSCDMA transmitters in terms of overall delay, area consumed, complexity and power. The proposed architecture is implemented in SPARTAN 3 FPGA. Keywords: CORDIC, BPSK modulator, CI codes , FPGA.

How to Cite:

[1] Meghana Shetty, Yuvraj T, Praveen J, Raghavengra Rao R, “A novel architecture for a DSCDMA-CI transmitter using cordic and its FPGA Implementation,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE)

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