Abstract: In power generation industry, there is a huge demand regarding variation of Customer requirements/ feedback which needs of developing and modifying the software scripts. Adding Genset functions in software script causes Genset memory capacity on brink and it will be insufficient to add more smart functions to the Genset. Therefore in order to suffice the latest market needs, memory expansion is vital for the legitimate performance of the Genset. Further these causes heavy load on the framework of a Genset function and thus increases the execution time which may decline the performance of the Genset. This paper describes about the implementation of external memory and the intense approach reducing the execution time with the help of Throughput test setup. Hardware-in-the-loop (HIL) testing approach in the design of power electronics i.e. throughput setup is used which gives the real time simulation environment. Moreover, the setup interprets the particular task in a framework having overload task affecting the performance.In addition, generate the Throughput log of Memory expanded Genset boards in the database system for comparison and use it to correlate with existing Genset boards to review the ‘unskipped frame’ for achieving the goal of zero failure. Thus, obtaining the lower Throughput value eventually reduces the execution time for consistent behavior of Gensets. Finally, the canny way of Throughput testing for Memory Expansion of Genset is summarized here.
Keywords: Hardware-In-Loop (HIL), Memory Expansion, Throughput of Gensets, Fault Code Analysis.