Abstract: The CMOS PLL based Frequency Synthesizer is a vital role in Receiver front end Sub component. In general, the PLL contains PFD, Charge pump, Loop Filter, VCO and Frequency Divider, Voltage controlled oscillator (VCO) is a critical building block in PLL which decides the power consumed by the PLL and area occupied by the PLL. Here the Source Coupled VCO is proposed with adaptive voltage level technique to reduce the power consumption, then design of PLL and Clock recovery circuit by using different types of VCO and results are compared between them. It is designed in Tanner tool.
Keywords: Source Coupled VCO, PFD, PLL, CSVCO, Tanner tool, Frequency Divider and Charge Pump.