Abstract: Multilevel inverters include an array of power semiconductor devices and capacitor voltage sources, the output of which cause voltages with stepped waveforms to have compact distortion. The term multilevel starts with the three-level inverter introduced by Nabae et al. The most attractive features of multilevel inverters include output voltages with extremely low distortion, lower dv/dt, input current with very low distortion, generate smaller common-mode (CM) voltage (thus reducing the stress in the motor bearings), lower switching frequency, etc. The main advantage of this topology is that it does not need additional diodes or capacitors for implementation. The operation of the flying capacitor multilevel inverter topology is based on the connection of capacitors, without using extra diodes. The most important advantage of this topology is that the number of switching combinations through which a same output voltage level can be achieved and hence allows a better distribution of the energy demanded from the capacitors. A new topology has to be proposed that provide higher number of level with optimum number of devices and dc voltage sources. A generalized structure has to be derived that brings easier implementation for desired output voltages for medium voltage applications. Also a new modulation technique is proposed which enhances the fundamental voltage and reduces the Total Harmonic Distortion (THD).

Keywords: Modified cascaded multi-level dc link inverter, Multi career PWM, 60^o PWM technique, THD