Abstract:
Data hiding is the art of hiding data for various purposes such as; to maintain private data, secure confidential data and so on. There are lots of techniques used for data hiding and the well known technique is the Steganography. Steganography is one of the most powerful techniques to conceal the existence of hidden secret data inside a cover object. Images are the most popular cover medium used in steganography. Embedding secret information inside images requires intensive computations, and therefore, designing steganography in hardware speeds up steganography. This paper provides a hardware design of Least Significant Bit (LSB) steganography technique. The design utilizes the Spartan III FPGA kit of the Altera family and 2/3-LSB steganography algorithm to perform the steganography steps. The design balances the tradeoffs such as imperceptibility, quality and capacity.